Silicon Nanowires

8 nm Si nanowire

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Single electron tunnelling

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66 mV/dec subthreshold slope

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We have developed a top-down fabrication process for junctionless silicon nanowires with diameters down to 8 nm. These devices demonstrate excellent subthreshold characteristics with a slope of 66 mV/dec at 300 K. At low temperatures the nanowires demonstrate a range of quantum and low dimensional properties including quasi-1D electron transport, Luttinger liquid behaviour and single electron tunnelling / Coulomb blockage. We have also used the nanowires as sensors to determine the charge state of POM molecules with the demonstration of flash memory with the memory node of less than 2 nm and retention times over 3 months.


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    C. Busche, L. Vila-Nadal, J. Yan, H.N. Miras, De-L. Long, V.P. Georgiev, A. Asenov, R.H. Pedersen, N. Gadegaard, M.M. Mirza, D.J. Paul, J.M. Poblet and L. Cronin

  2. "One dimensional transport in silicon nanowire junction-less field effect transistors" Scientific Reports 7(1), 3004 (2017) - DOI: 10.1038/s41598-017-03138-5
    M.M. Mirza, F.J. Schupp, J.A. Mol, D.A. MacLaren, G.A.D. Briggs and D.J. Paul

  3. "Quantum interference in silicon one-dimensional junctionless nanowire field-effect transistors" Physical Review B 98(23), 235238 (2018) - DOI: 10.1103/PhysRevB.98.235428
    F.J. Schupp, M.M. Mirza, D.A. MacLaren, G.A.D. Briggs, D.J. Paul, and J.A. Mol

  4. "Impact of Randomly Distributed Dopants on Ω-Gate Junctionless Silicon Nanowire Transistors" IEEE Transactions on Electron Devices 65(5) (2018) - DOI: 10.1109/TED.2018.2817919
    H. Carrillo-Nunez, M.M. Mirza, D.J. Paul, D.A. MacLaren, A. Asenov, V.P. Georgiev,

  5. "Experimental and simulation study of 1D silicon nanowire transistors using heavily doped channels" IEEE Transactions on Nanotechnology 16, pp. 727 - 735 (2017)- DOI: 10.1109/TNANO.2017.2665691
    V.P. Georgiev, M.M. Mirza, A.-I. Dochioiu, F.-A. Lema, S.M. Amoroso, E. Towie, C. Riddet, D.A. MacLaren, A. Asenov and D.J. Paul