Semiconductor Device Group

 

 

The basic concept of scaling is to reduce all the dimensions of a transistor by a factor, K. In addition to the dimensions decreasing, a number of other parameters must increase or decrease (see table below and figure right).

 

 

 

 

Short channel effects such as DIBL start to occur when the non-scaling of certain parameters such as VT and depletion width occur for the shortest gate-length transistors. Constant electric field scaling has historically been used as this provides constant power density (the maximum power density is predominantly related to the thermal conductivity of the substrate).

 

 

 

 

 

On the left is shown the result of scaling with the exponential performance improvement of microprocessors and supercomputers since the 1970s. The number of FLOPS is directly related to the number of transistors, the circuit clock speed and the transistor dimensions. Scaling has been occuring since the discovery of the transistor and you can argue that it even goes back to the start of the vacuum tube in the 19th century for all of electronics!