Xingsheng Wang

Research

The variability dominates a more important role especially when the feature size of a semiconductor device reachs nanometer scale. This variability not only influences the the device I-V/C-V characteristics but also the performance of basic circuit units, so it is presenting a huge challenge for acedemia and industry researchers.

With the continuing scaling of CMOS progresses to decananometer, statistical varibility originated from discreteness and radomness of dopants due to small dimensions of devices is playing a major problem from 45 nm CMOS technology. In addition, designers may introduce irregularity by layout, and process such as lithography may also bring variation, the result of all of these is to make physical devices be out of geometrical shape and doping ideality and generate physical parameter variations such as strain variation. Variations in devices bring a big challenge in device electrical charateristics and circuit design.

Design challenges come from variations, not only from systematic but also from random. What an excellent researcher should do is to identify and reduce systematic deterministic variability, and to minimize the unknown (uncertainty) by better modellings and designs. Finally realize practical and theoretical analysis and optimal design.

I keep my interest in the variability of nano-CMOS devices. Utilizing the advanced TCAD softwares, I expect to construct feasible and practical simulations to identify and analyze variations in nano-devices, and try to present optimal solutions for design challenges.The followings are my focus fields.

  • MOSFET scaling: from 45nm technology to beyond;
  • Strained devices;
  • Small signal capacitance and transient simulation;
  • Stistical variability and reliability in nanoscale transistors;
  • Novel transistors: FDSOI and FinFET.
variation
Figure 1: Stress distribution in 25nm gate-last pMOSFET (ULIS 2009) ; Figure 2: Cover stroy figure (IEEE T-ED, Vol.58, no.8, pp.2293-2301, Aug. 2011) ; Figure 3: Statistical variability in 20nm SOI FinFET. (IEDM 2011, pp.103-106)

*****************************************************************

Former research in Mathematics

As Mandelbrot, the founder of fractal geometry, said in his book The Fractal Geometry of Nature (1983):

"Clouds are not spheres, mountains are not cones, coastlines are not circles, and bark is not smooth, nor does lightning travel in a straight line."

Before Mandelbrot, mathematicians believed that most of the patterns of nature were far too complex, irregular, fragmented and amorphous to be described mathematically. But Mandelbrot conceived and developed a new fractal geometry of nature based on the fourth dimension and Complex numbers which is capable of describing mathematically the most amorphous and chaotic forms of the real world. As Mandelbrot said: "Fractal geometry is not just a chapter of mathematics, but one that helps Everyman to see the same world differently."

Fractal geometry is a new way of looking at the world where we have been surrounded by natural patterns.

I entered the fractal world when pursuing MPhil in Mathematics at Tsinghua University, and was deeply fascinated by its beauty. Experts in this field actively discover new formulae while experts from outshides find it is a completely new way for their fields with excitement. But almost of them concentrate themselves on its static properties, ignoring its dynamic aspect. If introduce some operators such as Laplacian (or equivalently Dirichlet form) on fractals, people find that fractals give us more clues to this world, having some promising information that is related with Einstein's theory about the time space.:) Check my Master Thesis if you are interested.
fractal Mandelbrot set
******************************************************************

Publications

2012

  • A. S. Mohd Zain, S. Markov, B. Cheng, X. Wang and A. Asenov, "Comprehensive Study of the Statistical Variability in a 22nm Fully-Depleted Ultra-Thin-Body SOI MOSFET," EuroSOI 2012 Conference: Jan. 23-25, 2012.

2011

  • B. Benbakhti, K. Chan, E. Towie, K. Kalna, C. Riddet, X. Wang, G. Eneman, G. Hellings, K. De Meyer, M. Meuris and A. Asenov, "Numerical analysis of the new Implant-Free Quantum-Well CMOS: DualLogic approach," Solid-State Electronics, Vol. 63, No. 1, pp. 14–18,
  • A. S. Mohd Zain, B. Cheng, X. Wang and A. Asenov, "Insights on Device Performance of SOI MOSFET with 60 nm and 15 nm BOX Thickness," EuroSOI 2011 Conference: Jan. 17-19, 2011.
  • X. Wang, S. Markov and A. Asenov, "Channel-length dependence of statistical threshold-voltage variability in extremely scaled HKMG MOSFETs," in Proc. 12th Ultimate Integration on Silicon, Cork, Ireland, Mar. 14-16, 2011, pp. 175–178.
  • X. Wang, S. Roy, A. R. Brown and A. Asenov, "Impact of STI on Statistical Variability and Reliability of Decananometer MOSFETs," IEEE Electron Device Letters, Vol. 32, No. 4, pp. 479–481, Apr. 2011.
  • X. Wang, A. R. Brown, N. M. Idris, S. Markov, G. Roy and A. Asenov, "Statistical Threshold-Voltage Variability in Scaled Decananometer Bulk HKMG MOSFETs: A Full-Scale 3-D Simulation Scaling Study," IEEE Transactions on Electron Devices, Vol. 58, No. 8, pp. 2293–2301, Aug. 2011.
  • X. Wang, A. R. Brown, B. Cheng and A. Asenov, "Statistical Variability and Reliability in Nanoscale FinFETs," in Proc. IEEE International Electron Devices Meeting (IEDM), Washington DC, Dec. 5-7, 2011, pp. 103–106.

2010

  • B. Benbakhti, K. Kalna, X. Wang, B. Cheng and A. Asenov, "Impact of Raised Source/Drain in the In0.53Ga0.47As Channel Implant-Free Quantum-Well Transistor," in Proc. Ultimate Integration on Silicon, U.K, Mar. 2010, pp. 129–132.
  • B. Bindu, B. Cheng, G. Roy, X. Wang, S. Roy and A. Asenov, "Parameter set and data sampling strategy for accurate yet efficient statistical MOSFET compact model extraction," Solid-State Electronics, Vol. 54, No. 3, pp. 307–315, Mar. 2010.
  • A. R. Brown, X. Wang, S. Markov, B. Cheng and A. Asenov, "Simulation of statistical variability in 18 and 13nm bulk MOSFETs," Intel European Research and Innovation Conference: Oct. 12-14, 2010.
  • B. Cheng, D. Dideban, N. Moezi, C. Millar, G. Roy, X. Wang, S. Roy and A. Asenov, "Statistical Variability Compact Modeling Strategies for BSIM4 and PSP," IEEE Design and Test of Computers, Vol. 27, No. 2, pp. 26–35, Mar./Apr. 2010.
  • B. Cheng, D. Dideban, N. Moezi, C. Millar, G. Roy, X. Wang, S. Roy and A. Asenov, "Capturing Intrinsic Parameter Fluctuations using the PSP Compact Model," in Proc. Design, Automation and Test in Europe, Dresden, Germany, Mar. 8-12, 2010, pp. 650–653.
  • D. Dideban, B. Cheng, N. Moezi, X. Wang and A. Asenov, "Evaluation of 35nm MOSFET Capacitance Components in PSP Compact Model," ICEE2010: Isfahan, Iran, May 11-13, 2010.
  • N. A. Kamsani, B. Cheng, C. Millar, N. Moezi, X. Wang, S. Roy and A. Asenov, "Impact of Slew Rate Definition on the Accuracy of nanoCMOS Inverter Timing Simulations," in Proc. Ultimate Integration on Silicon, Glasgow, Scotland, UK, Mar. 17-19, 2010,

2009

  • X. Wang, S. Roy and A. Asenov, "Impact of Strain on the Performance of high-k/metal replacement gate MOSFETs," in Proc. 10th ULIS, Aachen Germany, Mar. 18-20, 2009, pp. 289–292.

2008

  • A. Asenov, S. Roy, A. R. Brown, G. Roy, C. L. Alexander, C. Riddet, C. Millar, B. Cheng, A. Martinez, N. Seoane, D. Reid, M. Faiz. Bukhori, X. Wang and U. Kovac, "Advanced simulation of statistical variability and reliability in nano CMOS transistors," in Proc. IEDM, USA, Dec. 2008, p. 421.
  • B. Bindu, B. Cheng, G. Roy, X. Wang, S. Roy and A. Asenov, "An efficient data sampling strategy for statistical parameter extraction of nano-MOSFETs," IEEE Workshop on Compact Modeling: Sept. 8-8, 2008.
  • X. Wang, B. Cheng, S. Roy and A. Asenov, "Simulation of Strain Enhanced Variability in nMOSFETs," in Proc. Ultimate Integration on Silicon, Udine Italy, Mar. 12-14, 2008, pp. 89–92.
  • X. Wang, S. Roy and A. Asenov, "Impact of Strain on LER Variability in bulk MOSFETs," in Proc. 38th European Solid-State Device Research Conference (ESSDERC), Edinburgh Scotland U.K. Sept. 15-19, 2008, pp. 190–193.
  • X. Wang, S. Roy and A. Asenov, "High Performance MOSFET Scaling Study from Bulk 45 nm Technology Generation," in Proc. 9th International Conference on Solid-State and Integrated-Circuit Technology (ICSICT), Beijing China, Oct. 20-23, 2008, pp. 484–487.
Previous publishing

1.Domains of Dirichlet forms and effective resistance estimates on p.c.f. fractals (with J. Hu), Studia Math. 177 (2006), 153-172.pdf. (Tsinghua University Best Master Thesis)

2.Suppression Techniques against Narrow-Band Interference in DS/SS Communications System, Computer Simulation, 23(1), 2006, 294-298. (Beijing Technology and Business University Best Bachelor Thesis)

[back]

Xingsheng and Elvis

University of Glasgow